The STD Bus is a computer bus that was used primarily for industrial control systems, but has also found applications in computing. The STD Bus has also been designated as STD-80, referring to its relation to the Zilog Z80 series processors. The term STD is in reference to "Standard", but several marketing terms were also promulgated, including Simple To Design, Simple To Debug, and Swift To Deliver.
The STD Bus uses 6.5" by 4.5" expansion card with an edge connector with 56 pins. Many different types of cards have been available for the STD Bus, from processing cards, RAM cards, I/O cards, and specialized cards for various applications.
The use of the STD bus has declined. From the over one hundred manufacturers of components during its peak, vendor numbers have dwindled to under a dozen, but it is still used by hobbyists, manufacturers and in industrial applications.
Connector pin assignments
The STD Bus has a card edge connector with 56 contacts. The pin configuration is as follows. Flow is relative using a STD Bus Processor Card.
|Pin||Mnemonic||Signal Flow||Description||Pin||Mnemonic||Signal Flow||Description|
|1||+5V||In||Logic Power||2||+5V||In||Logic Power|
|3||GND||In||Logic Ground||4||GND||In||Logic Ground|
|5||-5V||In||Negative Logic Power||6||-5V||In||Negative Logic Power|
|7||D3||In/Out||Data Bus||8||D7||In/Out||Data Bus|
|9||D2||In/Out||Data Bus||10||D6||In/Out||Data Bus|
|11||D1||In/Out||Data Bus||12||D5||In/Out||Data Bus|
|13||D0||In/Out||Data Bus||14||D4||In/Out||Data Bus|
|15||A7||Out||Address Bus||16||A15||Out||Address Bus|
|17||A6||Out||Address Bus||18||A14||Out||Address Bus|
|19||A5||Out||Address Bus||20||A13||Out||Address Bus|
|21||A4||Out||Address Bus||22||A12||Out||Address Bus|
|23||A3||Out||Address Bus||24||A11||Out||Address Bus|
|25||A2||Out||Address Bus||26||A10||Out||Address Bus|
|27||A1||Out||Address Bus||28||A9||Out||Address Bus|
|29||A0||Out||Address Bus||30||A8||Out||Address Bus|
|31||WR||Out||Write to Memory or I/O||32||RD||Out||Read to Memory or I/O|
|33||IORQ||Out||I/O Address Select||34||MEMRQ||Out||Memory Address Select|
|35||IOEX||Out||I/O Expansion||36||MEMEX||Out||Memory Expansion|
|37||REFRESH||Out||Refresh Timing||38||MCSYNC||Out||CPU Machine Cycle Sync|
|39||STATUS 1||Out||CPU Status||40||STATUS 0||Out||CPU Status|
|41||BUSAK||Out||Bus Acknowledge||42||BUSRQ||In||Bus Request|
|43||INTAK||Out||Interrupt Acknowledge||44||INTRQ||In||Interrupt Request|
|45||WAITRQ||In||Wait Request||46||NMIRQ||In||Non-Maskable Interrupt|
|47||SYSRESET||Out||System Reset||48||PBRESET||In||Push Button Reset|
|49||CLK||Out||Clock from Processor||50||CNTRL||In||Aux Timing|
|51||PCO||Out||Priority Chain Out||52||PCI||In||Priority Chain In|
|53||AUX GND||In||AUX Ground||54||AUX GND||In||AUX Ground|
|55||AUX +12V||In||AUX Positive||56||AUX -12V||In||AUX Negative|
The STD bus system was more adaptable to various applications than the contemporary computer buses of the mid-1980s, because it could use servo control cards along with a fully programmable computer for mathematical operations.
In applications for running an astronomical observatory, the large industrial base of cards, and the system's expandability, made the system desirable for use in a photometry lab to control the telescope as well as do the data logging and computations required.
The STD-32 is a pin compatible STD interface that allows the co-existence of both 8-bit and 32-bit systems on a single bus. This is accomplished by the addition of pins between the normal pins that do not connect, nor do they interfere with the original specification. This allows with the proper STD-32 backplane the ability to run legacy cards used for specific applications on the same bus without having to upgrade the complete system.
- Prolog 7801 8085A Processor Card Specifications September 1981
- The STD Bus and other microcomputer buses for photometrists. By Russell M. Genet and Douglass J. Sauer. From the Fairborn Observatory in Fairborn Ohio.